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Found 6 papers, 0 papers with code
SpikeExplorer: hardware-oriented Design Space Exploration for Spiking Neural Networks on FPGA
One of today's main concerns is to bring Artificial Intelligence power to embedded systems for edge applications.
SpikingJET: Enhancing Fault Injection for Fully and Convolutional Spiking Neural Networks
As artificial neural networks become increasingly integrated into safety-critical systems such as autonomous vehicles, devices for medical diagnosis, and industrial automation, ensuring their reliability in the face of random hardware faults becomes paramount.
A Micro Architectural Events Aware Real-Time Embedded System Fault Injector
The occurrence of soft errors, in turn, may lead to system faults that can propel the system into a hazardous state.
Spiker+: a framework for the generation of efficient Spiking Neural Networks FPGA accelerators for inference at the edge
In this case, the accelerator requires 18, 268 logic cells and 51 BRAM, with an overall power consumption of 430mW and a latency of 54 us for a complete inference on input data.
Fast Exploration of the Impact of Precision Reduction on Spiking Neural Networks
Approximate Computing (AxC) techniques trade off the computation accuracy for performance, energy, and area reduction gains.
Spiker: an FPGA-optimized Hardware acceleration for Spiking Neural Networks
This work presents the development of a hardware accelerator for a SNN for high-performance inference, targeting a Xilinx Artix-7 Field Programmable Gate Array (FPGA).
