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Found 6 papers, 1 papers with code
Implementing a LoRa Software-Defined Radio on a General-Purpose ULP Microcontroller
In this work, we explore a software-defined radio architecture by demonstrating a LoRa transceiver running on custom ULP MCU codenamed SleepRider with an ARM Cortex-M4 CPU.
Bottom-up and top-down approaches for the design of neuromorphic processing systems: Tradeoffs and synergies between natural and artificial intelligence
In this paper, we provide a comprehensive overview of the field, highlighting the different levels of granularity at which this paradigm shift is realized and comparing design approaches that focus on replicating natural intelligence (bottom-up) versus those that aim at solving practical artificial intelligence applications (top-down).
A 28-nm Convolutional Neuromorphic Processor Enabling Online Learning with Spike-Based Retinas
With an energy per classification of 313nJ at 0. 6V and a 0. 32-mm$^2$ area for accuracies of 95. 3% (on-chip training) and 97. 5% (off-chip training) on MNIST, we demonstrate that SPOON reaches the efficiency of conventional machine learning accelerators while embedding on-chip learning and being compatible with event-based sensors, a point that we further emphasize with N-MNIST benchmarking.
A Low-Complexity LoRa Synchronization Algorithm Robust to Sampling Time Offsets
Using this model, we propose a new estimator for the sampling time offset.
Learning without feedback: Fixed random learning signals allow for feedforward training of deep neural networks
While the backpropagation of error algorithm enables deep neural network training, it implies (i) bidirectional synaptic weight transport and (ii) update locking until the forward and backward passes are completed.
MorphIC: A 65-nm 738k-Synapse/mm$^2$ Quad-Core Binary-Weight Digital Neuromorphic Processor with Stochastic Spike-Driven Online Learning
Recent trends in the field of neural network accelerators investigate weight quantization as a means to increase the resource- and power-efficiency of hardware devices.
