no code implementations • 10 Nov 2021 • Atefeh Sohrabizadeh, Yuze Chi, Jason Cong
While there have been many studies on hardware acceleration for deep learning on images, there has been a rather limited focus on accelerating deep learning applications involving graphs.
1 code implementation • 8 Oct 2021 • Linghao Song, Yuze Chi, Jason Cong
In this work, we present PYXIS, a performance dataset for specialized accelerators on sparse data.
1 code implementation • 12 Oct 2020 • Young-kyu Choi, Yuze Chi, Jie Wang, Licheng Guo, Jason Cong
With the recent release of High Bandwidth Memory (HBM) based FPGA boards, developers can now exploit unprecedented external memory bandwidth.
Hardware Architecture