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VLSI Extreme Learning Machine: A Design Space Exploration
In this paper, we describe a compact low-power, high performance hardware implementation of the extreme learning machine (ELM) for machine learning applications.
Hardware Architecture for Large Parallel Array of Random Feature Extractors applied to Image Recognition
We demonstrate a low-power and compact hardware implementation of Random Feature Extractor (RFE) core.
A 128 channel Extreme Learning Machine based Neural Decoder for Brain Machine Interfaces
The chip is verified with neural data recorded in monkey finger movements experiment, achieving a decoding accuracy of 99. 3% for movement type.
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